芯片验证实习生 DV Intern (Jul - Dec 2025)
AMD
Remote πππ 16 April
R&D, Innovation
Shanghai, China 🇨🇳
Qualifications
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicantsβ needs under the respective laws throughout all stages of the recruitment and selection process.Responsibilities
οΌε¦ε·²ε¨BOSSη΄θζιοΌθ―·εΏε¨ζ€ιε€ζιοΌ An exciting internship opportunity to make an immediate contribution to AMD's next generation of technology innovations awaits you! We have a multifaceted, high-energy work environment filled with a diverse group of employees, and we provide outstanding opportunities for developing your career. During your internship, our programs provide the opportunity to collaborate with AMD leaders, receive one-on-one mentorship, attend amazing networking events, and much more. Being part of AMD means receiving hands-on experience that will give you a competitive edge. Together We Advance your career! JOB DETAILS: Location: Shanghai, China Onsite/Hybrid: This role requires the student to work full time (40 hours a week), either in a hybrid or onsite or remote work structure throughout the duration of the co-op/intern term. Duration: 7-1-2025 to 12-31-2025. WHAT YOU WILL BE DOING: We are seeking highly motivated Design verification Engineering intern/co-op to join our team. In this role β Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation. Own or be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure, while providing technical leadership to the team. Own verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification. Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology. WHO WE ARE LOOKING FOR: Advanced knowledge of ASIC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM Familiarity with industry standard high-speed protocols such as PCIE is a plus Strong analytical and problem solving skills with pronounced attention to detail Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent qualitySimilar jobs
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