Fall 2025 PhD Analog/mixed-signal SerDes design Intern/Co-Op
AMD
On-site 🏢 19 May
R&D, Innovation
California, United States 🇺🇸
Qualifications
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.Responsibilities
An exciting internship opportunity to make an immediate contribution to AMD's next generation of technology innovations awaits you! We have a multifaceted, high-energy work environment filled with a diverse group of employees, and we provide outstanding opportunities for developing your career. During your internship, our programs provide the opportunity to collaborate with AMD leaders, receive one-on-one mentorship, attend amazing networking events, and much more. Being part of AMD means receiving hands-on experience that will give you a competitive edge. Together We Advance your career! JOB DETAILS: Location: San Jose, CA Onsite: This role requires the student to work from the San Jose, CA office throughout the duration of the Co-op/Intern term. First-time Co-ops/Interns should work full-time and onsite. Duration: Fall 2025: September 8 - December 12, 2025 WHAT YOU WILL BE DOING: AMD is currently seeking an analog/mixed-signal design intern to join our world-class team. The candidate will be responsible for the design of high-speed ADC-based receivers, DAC-based transmitters, or silicon-photonics transceivers. Define circuit architectures optimized for high bandwidth electrical and optical links Perform link level simulation in Matlab and/or SPICE to prove the architecture Perform design and modeling of on-die RF passive components (e.g., inductors and capacitors) and/or optical structures Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation, clock distribution) required to implement the architecture in advanced FinFET process WHO WE ARE LOOKING FOR: You are currently enrolled in an accredited US University, pursuing a PhD degree in Computer Engineering, or Electrical Engineering. If you have knowledge / experience with any of the following technical skills (or related areas) and are enthusiastic about this role, we strongly encourage you to apply – Experience in design & simulation of analog/mixed signal circuits (ADC, DAC, CTLE, PLL, Clocking circuits.etc) for SerDes links Proficient in CMOS circuit designs with advanced technology nodes Proficient in CAD Tools for simulations and design implementation Experience design of wireline and optical transceiver building blocks Strong circuit design familiarity in high-speed SerDesSimilar jobs
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