Mixed Signal Circuit Designer (RDSS Intern)
NVIDIA
On-site 🏢 04 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
We are looking for a Mixed-Signal/Analog/IO Circuit Design Engineer – someone who is excited to join a rapidly growing team of creative circuit design engineers pushing frontiers of the high-speed DRAM SerDes solutions. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.
By submitting your resume, you’re expressing interest in our 2025 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying for the role.
What you'll be doing:
Mixed-Signal/Analog circuit design for High-Speed Memory I/O Interfaces
Develop and implement high speed interfaces and analog circuits using the latest CMOS FinFET processes
Help define circuit requirements and complete design from schematic, layout, and verification to characterization
Optimize design to meet the specifications for system performance.
What we need to see:
TX/RX related design experience or is fairly familiar with high-speed SerDes/analog circuit design concepts
MS degree (CS/EE) or equivalent experience.
CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET)
Strong background of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre
Experience in crafting test bench environments for component and top level circuit verification
Knowledge of Verilog, Verilog-A, Matlab, or similar tools for behavioral modeling of analog and digital circuits is a plus
Strong debugging and analytical skills
Strong interpersonal skills and ability & desire to work as a good teammate
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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Remote 🌎🌍🌏 05 November
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Research Scientist 4 - Content and Studio
On-site 🏢 23 July
R&D, Innovation
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ASIC Design Efficiency Engineer - New College Grad 2025
On-site 🏢 31 October
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California, United States 🇺🇸
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On-site 🏢 06 November
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Zurich, Switzerland 🇨🇭
Research Assistant - PFE 2025
On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
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Hsinchu, Taiwan 🇹🇼
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On-site 🏢 20 September
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Ontario, Canada 🇨🇦
ASIC TOP Floorplan Intern - 2025
On-site 🏢 28 October
R&D, Innovation
Shanghai, China 🇨🇳
Research Intern - Azure Research – Systems
Hybrid 🏡🏢 25 October
R&D, Innovation
Washington, United States 🇺🇸
ASIC Verification Engineer - New College Grad 2025
On-site 🏢 31 October
R&D, Innovation
California, United States 🇺🇸
Research Intern - Biomedical AI for Precision Health
Hybrid 🏡🏢 04 November
R&D, Innovation
Washington, United States 🇺🇸 Massachusetts, United States 🇺🇸 California, United States 🇺🇸
2025 Summer Intern- Mold Center
On-site 🏢 17 September
R&D, Innovation
South Carolina, United States 🇺🇸
Student / Intern - Oracle Labs
On-site 🏢 22 February
R&D, Innovation
Zurich, Switzerland 🇨🇭
Graphics Architect, Hardware - New College Grad 2025
On-site 🏢 05 November
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California, United States 🇺🇸
Research Assistant - PFE 2025
On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
Product Test Engineer (RDSS Intern) - 2025
On-site 🏢 25 November
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Hsinchu, Taiwan 🇹🇼
Field Development Engineer Intern
On-site 🏢 05 November
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Singapore 🇸🇬
Research Intern - Algorithms Group: Theory
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On-site 🏢 09 October
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Taipei, Taiwan 🇹🇼
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California, United States 🇺🇸 Remote, United States 🇺🇸
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Remote 🌎🌍🌏 21 October
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California, United States 🇺🇸
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California, United States 🇺🇸
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On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
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On-site 🏢 21 October
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Shanghai, China 🇨🇳 Beijing, China 🇨🇳
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Casablanca, Morocco 🇲🇦
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Zurich, Switzerland 🇨🇭
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Tel Aviv, Israel 🇮🇱
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Hybrid 🏡🏢 23 October
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Washington, United States 🇺🇸
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On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
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Hybrid 🏡🏢 12 November
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Casablanca, Morocco 🇲🇦
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Casablanca, Morocco 🇲🇦
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Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
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Hybrid 🏡🏢 27 November
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Washington, United States 🇺🇸
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Casablanca, Morocco 🇲🇦
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Casablanca, Morocco 🇲🇦
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Washington, United States 🇺🇸
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On-site 🏢 22 October
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Taipei, Taiwan 🇹🇼
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Hybrid 🏡🏢 22 November
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Washington, United States 🇺🇸
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Washington, United States 🇺🇸
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Casablanca, Morocco 🇲🇦
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Remote 🌎🌍🌏 12 November
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California, United States 🇺🇸 Remote, United States 🇺🇸
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London, United Kingdom 🇬🇧 Cambridge, United Kingdom 🇬🇧 Edinburgh, United Kingdom 🇬🇧
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Tel Aviv, Israel 🇮🇱
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Helsinki, Finland 🇫🇮 Amsterdam, Netherlands 🇳🇱 Zurich, Switzerland 🇨🇭
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On-site 🏢 29 November
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Singapore 🇸🇬
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On-site 🏢 15 November
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Taipei, Taiwan 🇹🇼 Hsinchu, Taiwan 🇹🇼
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Washington, United States 🇺🇸 California, United States 🇺🇸
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Washington, United States 🇺🇸
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Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
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Casablanca, Morocco 🇲🇦
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Casablanca, Morocco 🇲🇦
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Casablanca, Morocco 🇲🇦
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Milan, Italy 🇮🇹
Research Assistant - PFE 2025
On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
ASIC Physical Design Engineer -RDSS Intern
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R&D, Innovation
Hsinchu, Taiwan 🇹🇼
NVIDIA 2025 Internships: Hardware Verification
Remote 🌎🌍🌏 30 August
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California, United States 🇺🇸 Remote, United States 🇺🇸
Research Intern - LLM Inference Acceleration and Optimization
Hybrid 🏡🏢 22 November
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Washington, United States 🇺🇸 California, United States 🇺🇸
Research Assistant - PFE 2025
On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site 🏢 10 August
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Casablanca, Morocco 🇲🇦
VLSI Physical Design CAD Intern - Summer 2025
On-site 🏢 17 October
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Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
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Casablanca, Morocco 🇲🇦
Engineering Intern (Tamheer)
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Al Riyadh, Saudi Arabia 🇸🇦
System Level Product Engineer (RDSS Intern)
On-site 🏢 08 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Mixed Signal Circuit Designer Intern
On-site 🏢 31 October
R&D, Innovation
Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
Mixed Signal Circuit Design Intern - 2025
On-site 🏢 22 October
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Service Process Innovation & Systems Support (INTERNSHIP)
Hybrid 🏡🏢 08 August
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Milano, Italy 🇮🇹
Research Assistant - PFE 2025
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Casablanca, Morocco 🇲🇦
Chip Design and Verification Engineer
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Tel Aviv, Israel 🇮🇱
Research Assistant - PFE 2025
On-site 🏢 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site 🏢 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site 🏢 31 October
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
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Casablanca, Morocco 🇲🇦
Microsoft Research Africa - Design Intern
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PhD Research Intern, Computer Architecture and Systems - 2025
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