Timing Methodology Engineer, Custom Circuits - New College Grad 2024
NVIDIA
On-site π’ 11 September
R&D, Innovation
California, United States 🇺🇸
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI β the next era of computing. NVIDIA is a βlearning machineβ that constantly evolves by adapting to new opportunities that are hard to resolve, that only we can seek, and that matter to the world. This is our lifeβs work, to amplify human inventiveness and intelligence.
We are seeking an innovative Custom Circuits Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and SoCs. This position is a broad opportunity to optimize performance, yield, and reliability through increasingly comprehensive modeling, informative analysis, and automation. This work will influence the entire next generation computing landscape through critical contributions across NVIDIA's many product lines ranging from consumer graphics to self-driving cars and the growing domain of artificial intelligence! We have crafted a team of highly motivated people whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. If you are fascinated by the immense scale of precision, craftsmanship, and artistry required to make billions of transistors function on every die at technology nodes as deep as 5 nm and beyond, this is an ideal role.
What You'll Be Doing:
- Develop Timing sign-off flows, constraints and QOR metrics for custom macro design at transistor level along with ones using standard cells and custom designs.
- Validating the timing of custom circuit design using NanoTime and various spice simulations.
- The timing analysis will include the application of variation and statistical parameters in timing-analysis. The QOR data generation will include IR drop, PVT and impact of variation models POCV,AOCV, Moments, wire-variation etc.
What We Need To See:
- Pursuing or recent completion of MS or higher in Electrical or Computer Engineering (or equivalent experience).
- Understanding of circuit design and spice simulations.
- Knowledge of advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm and beyond.
- Good understanding of circuit design styles in CMOS: domino circuits, high speed clocking, clock MUXing circuits etc. and how to verify them at circuit level in both spice and transistor level STA.
- Understanding crosstalk, noise, OCV, timing margins, Clocking specs (jitter, IR drop, crosstalk, and spice analysis).
- Experience with coding- TCL, Python. Must have hands-on experience with NanoTime static timing analysis, its algorithms and associated circuit constraint checks.
Ways to Stand Out From the Crowd:
- Prior experience in ASIC Design and Timing.
- Familiarity with ASIC tools, such as PT.
- Knowledge or experience with Cadence Virtuoso schematics, and .libs in Nanotime as well as PT.
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology worldβs most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you..
The base salary range is 108,000 USD - 201,250 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.
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Casablanca, Morocco 🇲🇦
Research Intern - SAINTES + Developer Experience
Hybrid π‘π’ 12 November
R&D, Innovation
Washington, United States 🇺🇸
2025 Applied Scientist Internship, Amazon University Talent Acquisition
On-site π’ 08 October
R&D, Innovation
Barcelona, Spain 🇪🇸 Madrid, Spain 🇪🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
2025 Applied Science Internship - Automated Reasoning - United States, PhD Student Science Recruiting
On-site π’ 02 October
R&D, Innovation
Seattle, United States 🇺🇸
Engineering Intern (Tamheer)
On-site π’ 13 July
R&D, Innovation
Al Riyadh, Saudi Arabia 🇸🇦
Student / Intern in Oracle Labs
On-site π’ 22 April
R&D, Innovation
Zurich, Switzerland 🇨🇭
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Student / Intern - Oracle Labs
On-site π’ 22 February
R&D, Innovation
Zurich, Switzerland 🇨🇭
Research Scientist, AI-Mediated Reality and Interaction Research - New College Grad 2025
On-site π’ 05 November
R&D, Innovation
California, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
ASIC Physical Design Engineer -RDSS Intern
On-site π’ 26 September
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Mixed Signal Design Engineer - New College Grad 2024
On-site π’ 17 October
R&D, Innovation
California, United States 🇺🇸
Research Scientist 5 - Content and Studio
On-site π’ 01 October
R&D, Innovation
California, United States 🇺🇸
Graphics Architect, Hardware - New College Grad 2025
On-site π’ 05 November
R&D, Innovation
California, United States 🇺🇸
Chip Design Engineer
On-site π’ 18 November
R&D, Innovation
Tel Aviv, Israel 🇮🇱
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Cambridge Internship Opportunities – Research Intern
Hybrid π‘π’ 06 November
R&D, Innovation
Cambridgeshire, United Kingdom 🇬🇧
Hardware Design Verification Engineering Intern/Co-Op (Undergrad | Summer 2025 | Onsite/Hybrid)
On-site π’ 05 September
R&D, Innovation
Ontario, Canada 🇨🇦
Research Intern - MSR Inclusive Futures Team
Hybrid π‘π’ 07 November
R&D, Innovation
New York, United States 🇺🇸
Physical Design Engineer (RDSS Intern)
On-site π’ 17 October
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Mixed Signal Design Engineer (RDSS Intern)
On-site π’ 31 October
R&D, Innovation
Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
Research Scientist 4 - Content and Studio
On-site π’ 23 July
R&D, Innovation
California, United States 🇺🇸
Hardware Engineering Intern (Summer 2025 | Onsite/Hybrid)
On-site π’ 15 October
R&D, Innovation
Penicuik, United Kingdom 🇬🇧
Research Intern - LLM Inference Acceleration and Optimization
Hybrid π‘π’ 22 November
R&D, Innovation
Washington, United States 🇺🇸 California, United States 🇺🇸
GPU Performance Architect Intern - Summer 2025
On-site π’ 25 November
R&D, Innovation
California, United States 🇺🇸
Research Intern - MSR Inclusive Futures Team
Hybrid π‘π’ 25 October
R&D, Innovation
Washington, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
2025 Research Science Internship - Robotics - United States, PhD Student Science Recruiting
On-site π’ 15 November
R&D, Innovation
San Francisco, United States 🇺🇸
Research Intern - Action Models and Reinforcement Learning
Hybrid π‘π’ 15 August
R&D, Innovation
New York, United States 🇺🇸
ASIC Verification Engineer - New College Grad 2025
On-site π’ 31 October
R&D, Innovation
California, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - Azure Research – Systems
Hybrid π‘π’ 25 October
R&D, Innovation
Washington, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Design Verification Engineer (RDSS Intern)
On-site π’ 06 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 31 October
R&D, Innovation
Casablanca, Morocco 🇲🇦
TPC Arch Intern, GPU SM - 2025
On-site π’ 16 October
R&D, Innovation
Shanghai, China 🇨🇳
Research Intern - Product Strategy Intern
Hybrid π‘π’ 18 November
R&D, Innovation
Washington, United States 🇺🇸
Government Affairs Product Management Intern (AI for Good)
On-site π’ 14 November
R&D, Innovation
Brussels Region, Belgium 🇧🇪
GPU Firmware Engineer (RDSS Intern)
On-site π’ 09 October
R&D, Innovation
Taipei, Taiwan 🇹🇼
Research Scientist, Autonomous Vehicles - New College Grad 2025
Remote πππ 21 October
R&D, Innovation
California, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 09 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Intern, Oncology Epidemiologist
On-site π’ 08 October
R&D, Innovation
United States 🇺🇸
Research Intern - Algorithms Group: Theory
Hybrid π‘π’ 06 November
R&D, Innovation
Washington, United States 🇺🇸
Product Development Engineering Intern/Co-Op (Undergrad | Summer, 2025 | Onsite/Hybrid)
On-site π’ 19 September
R&D, Innovation
Ontario, Canada 🇨🇦
Applied Deep Learning Research Intern
On-site π’ 02 December
R&D, Innovation
Helsinki, Finland 🇫🇮 Amsterdam, Netherlands 🇳🇱 Zurich, Switzerland 🇨🇭
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Datacenter GPU Power Architect - New College Grad 2024
On-site π’ 07 June
R&D, Innovation
California, United States 🇺🇸
Research Engineer L4/L5 -LLMs for Search, Recommendations, and Personalization
On-site π’ 23 July
R&D, Innovation
California, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - MSR AI Interaction and Learning
Hybrid π‘π’ 30 October
R&D, Innovation
Washington, United States 🇺🇸
Student / Intern in Oracle Labs
On-site π’ 22 April
R&D, Innovation
Zurich, Switzerland 🇨🇭
Mixed Signal Circuit Design Intern - 2025
On-site π’ 22 October
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Board Design Engineer, LDE - New College Graduate
On-site π’ 07 May
R&D, Innovation
Shenzhen, China 🇨🇳
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Mixed Signal Analog Circuit Designer (RDSS Intern)
On-site π’ 12 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Fellowship Opportunity
Hybrid π‘π’ 26 August
R&D, Innovation
Karnataka, India 🇮🇳
Research Intern - RiSE group: Formal Methods, High-Performance Computing, Programming Languages, Software Engineering,
Hybrid π‘π’ 23 October
R&D, Innovation
Washington, United States 🇺🇸
Applied Research PhD Intern, Retriever - 2025
Remote πππ 27 November
R&D, Innovation
Munich, Germany 🇩🇪 Remote, France 🇫🇷 Cambridge, United Kingdom 🇬🇧 Remote, Germany 🇩🇪 Berlin, Germany 🇩🇪
Applied Scientist Intern (Computer Vision algorithms), Amazon Lab126, Taiwan
On-site π’ 16 October
R&D, Innovation
Taipei, Taiwan 🇹🇼 Hsinchu City, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Multimodal Researcher: PhD Internship Opportunities - Brazil,
Remote πππ 13 September
R&D, Innovation
Brazil 🇧🇷
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Product Test Engineer (RDSS Intern) - 2025
On-site π’ 25 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
GenAI PhD Research Intern - Oracle Cloud Infrastructure
On-site π’ 06 November
R&D, Innovation
United States 🇺🇸
2025 Summer Intern- Mold Center
On-site π’ 17 September
R&D, Innovation
South Carolina, United States 🇺🇸
Research Intern - AI-driven Hardware Design
Hybrid π‘π’ 07 October
R&D, Innovation
British Columbia, Canada 🇨🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Mixed Signal Design Engineer (RDSS Intern)
On-site π’ 15 November
R&D, Innovation
Taipei, Taiwan 🇹🇼 Hsinchu, Taiwan 🇹🇼
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
PCB Layout Engineer - New College Graduate
On-site π’ 16 October
R&D, Innovation
Shenzhen, China 🇨🇳
Silicon Solution Intern - 2025
On-site π’ 21 October
R&D, Innovation
Shanghai, China 🇨🇳
Research Intern - UX of AI
Hybrid π‘π’ 02 December
R&D, Innovation
Washington, United States 🇺🇸
Research Intern - Applied Sciences Group (Audio/Vision/NLP/Multimodal)
Hybrid π‘π’ 23 October
R&D, Innovation
Washington, United States 🇺🇸
Hardware Design Verification Engineering Intern/Co-Op (Undergrad | Winter 2025 | Onsite/Hybrid)
On-site π’ 27 September
R&D, Innovation
British Columbia, Canada 🇨🇦
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