Mixed Signal Design Engineer (RDSS intern)
NVIDIA
On-site π’ 22 October
R&D, Innovation
Hsinchu, Taiwan 🇹🇼 Taipei, Taiwan 🇹🇼
By submitting your resume, youβre expressing interest in our 2025 RDSS ( Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying the role.
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI β the next era of computing. NVIDIA is a βlearning machineβ that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our lifeβs work, to amplify human creativity and intelligence. Make the choice and join us today!
This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
What you'll be doing:
Develop and implement high speed interfaces and analog circuits. You will have hands on experience taking innovative integrated circuit designs at data rates of 25Gbps and higher from concept through silicon characterization.
Help by defining circuit requirements and complete design from schematic, layout, and verification to characterization.
Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or like.
Take ownership for the architecture, transistor design and verification using industry standard EDA tools such as Cadence virtuoso.
Optimize circuit to meet the specifications for system performance.
Work closely with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings.
Provide support for post-silicon bring-up and debugging.
What we need to see:
Hold a Master of Science/Ph.D in Electrical Engineering, Computer Engineering or related field with strong analog design background
CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET)
Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA)
Experience in crafting test bench environments for component and top level circuit verification
Behavioral modeling of analog and digital circuits
Strong debugging and analytical skills
Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc.
Strong interpersonal skills and ability & desire to work as a great teammate are huge plus.
β With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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On-site π’ 19 September
R&D, Innovation
Ontario, Canada 🇨🇦
2025 Co-Op: R&D Packaging
On-site π’ 29 August
R&D, Innovation
Texas, United States 🇺🇸 New York, United States 🇺🇸 Illinois, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - AI-driven Hardware Design
Hybrid π‘π’ 07 November
R&D, Innovation
Washington, United States 🇺🇸
Research Intern - Societally Safe and Secure AI
Hybrid π‘π’ 27 November
R&D, Innovation
Washington, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Chip Design and Verification Engineer
On-site π’ 29 July
R&D, Innovation
Tel Aviv, Israel 🇮🇱
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Fellowship Opportunity
Hybrid π‘π’ 26 August
R&D, Innovation
Karnataka, India 🇮🇳
PhD Research Intern, Large Language Models - 2025
Remote πππ 21 October
R&D, Innovation
California, United States 🇺🇸 Remote, United States 🇺🇸
Engineering Intern (Tamheer)
On-site π’ 13 July
R&D, Innovation
Al Riyadh, Saudi Arabia 🇸🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - Office of Applied Research
Hybrid π‘π’ 04 October
R&D, Innovation
Washington, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Cambridge Internship Opportunities – Research Intern
Hybrid π‘π’ 06 November
R&D, Innovation
Cambridgeshire, United Kingdom 🇬🇧
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - UX of AI
Hybrid π‘π’ 02 December
R&D, Innovation
Washington, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
2025 Applied Scientist Internship, Amazon University Talent Acquisition
On-site π’ 01 October
R&D, Innovation
Aachen, Germany 🇩🇪 Berlin, Germany 🇩🇪 Tuebingen, Germany 🇩🇪 Munich, Germany 🇩🇪
Hardware SoC Architect - New College Grad 2025
On-site π’ 05 November
R&D, Innovation
California, United States 🇺🇸 Massachusetts, United States 🇺🇸 Texas, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Student / Intern in Oracle Labs
On-site π’ 22 April
R&D, Innovation
Zurich, Switzerland 🇨🇭
Research Scientist, Design Automation - New College Grad 2025
On-site π’ 28 October
R&D, Innovation
Texas, United States 🇺🇸 California, United States 🇺🇸
ASIC Design Efficiency Engineer - New College Grad 2025
On-site π’ 31 October
R&D, Innovation
California, United States 🇺🇸
2025 Applied Science Internship - Computer Vision - United States, PhD Student Science Recruiting
On-site π’ 02 October
R&D, Innovation
Seattle, United States 🇺🇸
NVIDIA 2025 Internships: Mixed Signal / Circuit Design
On-site π’ 04 November
R&D, Innovation
California, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Scientist 5 - Content and Studio
On-site π’ 01 October
R&D, Innovation
California, United States 🇺🇸
Research Sciences Intern
Hybrid π‘π’ 15 November
R&D, Innovation
Karnataka, India 🇮🇳
Research Intern - ML and Computational Biology for the Immune System
Hybrid π‘π’ 04 November
R&D, Innovation
Washington, United States 🇺🇸
Mixed Signal Design Engineer - New College Grad 2024
On-site π’ 08 October
R&D, Innovation
California, United States 🇺🇸
Cambridge Internship Opportunities- Azure Research
Hybrid π‘π’ 06 November
R&D, Innovation
Cambridgeshire, United Kingdom 🇬🇧
Board Design Engineer, LDE - New College Graduate
On-site π’ 07 May
R&D, Innovation
Shenzhen, China 🇨🇳
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Graphics Architect, Hardware - New College Grad 2025
On-site π’ 05 November
R&D, Innovation
California, United States 🇺🇸
Research Intern - MSR Inclusive Futures Team
Hybrid π‘π’ 07 November
R&D, Innovation
New York, United States 🇺🇸
TPC Arch Intern, GPU SM - 2025
On-site π’ 16 October
R&D, Innovation
Shanghai, China 🇨🇳
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - MSR Inclusive Futures Team
Hybrid π‘π’ 25 October
R&D, Innovation
Washington, United States 🇺🇸
Signal and Power Integrity Engineer (RDSS Intern)
On-site π’ 06 November
R&D, Innovation
Taipei, Taiwan 🇹🇼 Hsinchu, Taiwan 🇹🇼
Research Scientist 4 - Content and Studio
On-site π’ 23 July
R&D, Innovation
California, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 09 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - AI-driven Hardware Design
Hybrid π‘π’ 07 October
R&D, Innovation
British Columbia, Canada 🇨🇦
Design Verification Engineer (RDSS Intern)
On-site π’ 06 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
2025 Summer Intern: R&D (TDC/Life Science)
On-site π’ 02 August
R&D, Innovation
Texas, United States 🇺🇸 New York, United States 🇺🇸 Illinois, United States 🇺🇸
Research Scientist, Fundamental LLM Research for Knowledge, Reasoning, and Agents - New College Grad 2025
Remote πππ 05 November
R&D, Innovation
California, United States 🇺🇸 Remote, United States 🇺🇸
Barcelona Research Intern – Gray Systems Lab
Hybrid π‘π’ 08 November
R&D, Innovation
Barcelona, Spain 🇪🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
2025 Applied Science Internship - Canada, PhD Student Science Recruiting
On-site π’ 02 October
R&D, Innovation
Vancouver, Canada 🇨🇦 Pitt Meadows, Canada 🇨🇦 Toronto, Canada 🇨🇦 Burnaby, Canada 🇨🇦
Hardware Design Engineering Intern/Co-Op (Undergrad | Summer 2025 | Onsite/Hybrid)
On-site π’ 05 September
R&D, Innovation
Ontario, Canada 🇨🇦
2025 Research Science Internship - Robotics - United States, PhD Student Science Recruiting
On-site π’ 15 November
R&D, Innovation
San Francisco, United States 🇺🇸
GenAI PhD Research Intern - Oracle Cloud Infrastructure
On-site π’ 06 November
R&D, Innovation
United States 🇺🇸
Research Intern - Biomedical Signal Processing
Hybrid π‘π’ 14 November
R&D, Innovation
Washington, United States 🇺🇸
VLSI Physical Design CAD Intern - 2025
On-site π’ 21 October
R&D, Innovation
Shanghai, China 🇨🇳 Beijing, China 🇨🇳
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Silicon Solution Intern - 2025
On-site π’ 21 October
R&D, Innovation
Shanghai, China 🇨🇳
Research Intern - MSR Intelligent Networked Systems
Hybrid π‘π’ 23 October
R&D, Innovation
Washington, United States 🇺🇸
2025 ASIC Physical Design Engineer Intern, Annapurna Labs
On-site π’ 03 October
R&D, Innovation
Austin, United States 🇺🇸 Cupertino, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Chip Design Engineer
On-site π’ 18 November
R&D, Innovation
Tel Aviv, Israel 🇮🇱
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
NVIDIA 2025 Internships: Hardware Verification
Remote πππ 30 August
R&D, Innovation
California, United States 🇺🇸 Remote, United States 🇺🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Intern - Post-Transformer
Hybrid π‘π’ 22 November
R&D, Innovation
Washington, United States 🇺🇸
Research Intern - Extended Perception Interaction Cognition (EPIC)
Hybrid π‘π’ 03 December
R&D, Innovation
Washington, United States 🇺🇸
Research Intern - Audio and Acoustics
Hybrid π‘π’ 31 October
R&D, Innovation
Washington, United States 🇺🇸
Silicon Design Intern
On-site π’ 20 September
R&D, Innovation
Taipei City 115, Taiwan 🇹🇼
Cambridge Research Intern – Efficient AI
Hybrid π‘π’ 13 November
R&D, Innovation
Cambridgeshire, United Kingdom 🇬🇧
Silicon Validation Engineer (RDSS Intern)
On-site π’ 22 October
R&D, Innovation
Taipei, Taiwan 🇹🇼
ASIC Physical Design Engineer -RDSS Intern
On-site π’ 26 September
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Product Test Engineer (RDSS Intern) - 2025
On-site π’ 25 November
R&D, Innovation
Hsinchu, Taiwan 🇹🇼
Field Development Engineer Intern
On-site π’ 05 November
R&D, Innovation
Singapore 🇸🇬
Research Assistant - PFE 2025
On-site π’ 09 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Hardware Design Verification Engineering Intern/Co-Op (Undergrad | Summer 2025 | Onsite/Hybrid)
On-site π’ 05 September
R&D, Innovation
Ontario, Canada 🇨🇦
PhD Research Intern, Graphics - 2025
Remote πππ 21 October
R&D, Innovation
California, United States 🇺🇸 Remote, United States 🇺🇸
2025 Applied Scientist Internship, Amazon University Talent Acquisition
On-site π’ 08 October
R&D, Innovation
Barcelona, Spain 🇪🇸 Madrid, Spain 🇪🇸
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
Chip Design Engineer
On-site π’ 22 September
R&D, Innovation
Tel Aviv, Israel 🇮🇱
Research Assistant - PFE 2025
On-site π’ 10 August
R&D, Innovation
Casablanca, Morocco 🇲🇦
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